In the development of semiconductor devices, particularly, semiconductor storage devices, miniaturization of memory cells has proceeded in order to achieve higher capacity, lower cost, and the like. For example, development of three-dimensional NAND type flash memory devices in which memory cells are three-dimensionally arranged have proceeded. In the three-dimensional NAND type flash memory device, a NAND string in which memory cells are connected in a direction (so-called vertical direction) perpendicular to the word line layer surface is formed in word line layers stacked with interposing dielectric layers. Therefore, higher integration is achieved as compared with a case where memory cells are two-dimensionally arranged. In the three-dimensional NAND flash memory device, as a structure for connecting a wire of another layer to the conductive layer to be a word line of each stacked layer, there is a structure in which the conductive layers are formed in a staircase shape so as to be shifted from layer to layer, and thus, it is easy to connect with a contact on the upper layer side. However, in some cases, a contact penetrates through a target conductive layer and reaches the conductive layer on the lower layer side, so that electrical connection may be formed between the contact and the conductive layer on the lower layer side.